1. Field of the Invention
The present invention relates to integrated circuit technology. More particularly, the present invention relates to a writable analog reference storage device circuit for inclusion on an integrated circuit.
2. The Prior Art
Integrated circuit pin count translates directly into cost per packaged integrated circuit in terms of packaging and circuit board space. There is thus a need to maintain low pin counts on production integrated circuits. Because of the competing consideration to maximize functionality of the integrated circuit, maintaining a low pin count presents a challenge to the integrated circuit designer.
For example, a particular challenge exists in designing analog and mixed analog-digital integrated circuits which require analog voltage references and bias signals. In the prior art, use has been made of dynamic circuits for storing and periodically refreshing analog voltages in an on-chip circuit, such as a sample/hold circuit. However, this approach requires off-chip memory and digital-to-analog converter circuits, or the like. In addition, the dynamic refresh cycle clocking needed for such circuits generates additional on-chip noise which must be dealt with if dynamic refresh schemes are contemplated. An alternative solution which may be employed to provide on-chip voltage references and bias voltages utilizes on-chip EEPROMs and digital-to-analog converters. This solution, however, requires allocation of valuable chip area to accommodate the additional circuitry.
There is thus a need for circuitry which can provide on-chip analog reference and bias voltages without requiring use of an unacceptably large number of chip I/O pins or requiring significant additional on-chip or off-chip circuitry.